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description designed for linear control of small form factor voice coil motors, the A3907 is capable of peak output currents to 102 ma and operating voltages to 5.5 v. internal circuit protection includes thermal shutdown with hysteresis, flyback clamp diode, and undervoltage monitoring of v dd . A3907-ds, rev. 1 features and benefits ? wlcsp package for minimum footprint ? ramp control circuit ? fixed i 2 c logic thresholds ? 10-bit d-to-a converter ? 100 a resolution ? low voltage i 2 c serial interface ? low current draw sleep mode-active low ? 2.3 to 5.5 v operation low voltage voice coil motor driver package: 6-bump chip scale package (suffix cg) applications: ? camera focus motor functional block diagram A3907 i2c serial interface iout vdd sda scl gnd 10 bit dac bandgap ref 2.3 to 5.5v sleepz 1.8 k 1.8 k timer control logic 1.2 1.8 v
low voltage voice coil motor driver A3907 2 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com absolute maximum ratings characteristic symbol notes rating unit supply voltage v dd 6v logic input voltage range v in ?0.3 to v dd + 0.3 v operating ambient temperature t a range e ?40 to 85 oc junction temperature t j (max) 150 oc storage temperature t stg ?40 to 150 oc thermal characteristics characteristic symbol test conditions* value unit package thermal resistance r ja on 4-layer pcb based on jedec standard 64 oc/w *additional thermal information available on the allegro website selection guide part number packing package pb-free A3907ecgtr 4000 pieces per reel bumped wafer-level chip-scale package (wlcsp) pb-free chip with high-temperature solder balls (rohs compliant)
low voltage voice coil motor driver A3907 3 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com electrical characteristics valid at t a = 25c, v dd = 2.3 to 5.5 v; unless otherwise noted characteristics symbol test conditions min. typ. max. unit supply current i dd ? 0.5 2 ma sleep mode (sleepz = low), v dd = 2.3 to 3.5 v ? < 100 500 na uvlo enable threshold v uvlo(th) v dd rising ? 2 2.295 v uvlo hysteresis v uvlo(hys) ? 100 ? mv thermal shutdown temperature t jtsd temperature increasing ? 165 ? c thermal shutdown hysteresis t jtsd(hys) recovery = t jtsd - t jtsd(hys) ? 15 ? c power-up delay t dpo ? 10 ? s d-to-a converter resolution res target = 100 a/lsb ? 10 ? bit relative accuracy err inl code = 64 to 1023, endpoint method ? 4 ? lsb differential nonlinearity err dnl guaranteed monotonic ? ? 1 lsb maximum output current i max code = 1023 ? 102.3 ? ma gain error err a t j = 25c, code 64 to 1023, v dd = 2.6 to 3.0 v ?10 < 3 10 %fs gain error drift 1 err a t j = ?40c to 125c ? 0.2 ? lsb/c minimum code error i os1 code = 1 0 1 5 ma offset error i os code = 64 ? 0.5 ? ma output slew rate timer err ts relative to target value ?10 ? 10 % output voltage range v out 0.35 ? v dd ? 0.1 v output on resistance r ds(on) r sense + r sink , i out = 102.3 ma ? 2 ? i 2 c interface bus free time between stop and start t buf 1.3 ? ? s hold time start condition t hd:sta 0.6 ? ? s setup time for repeated start condition t su:sta 0.6 ? ? s scl low time t low 1.3 ? ? s scl high time t high 0.6 ? ? s data setup time t su:dat 100 ? ? ns data hold time t hd:dat 0 900 ? ns
low voltage voice coil motor driver A3907 4 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com i 2 c interface setup time for stop condition t su:sto 0.6 ? ? s logic input (sda, scl pins) low level v il ? ? 0.84 v logic input (sda, scl pins) high level v ih 1.26 ? ? v s l e e p pin input low level v slpinl ? ? 0.7 v s l e e p pin input high level v slpinh 1.5 ? ? v input hysteresis v hys sda and scl only ? 100 ? mv logic input current i in v in = 0 v to v dd ?1 0 1 a sda pin output voltage v ol i load = 1.5 ma ? ? 0.36 v scl clock frequency f clk ? ? 400 khz sda output fall time t of v ih to v il ? ? 250 ns 1 assured by design and characterization, not production tested. electrical characteristics (continued) valid at t a = 25c, v dd = 2.3 to 5.5 v; unless otherwise noted characteristics symbol test conditions min. typ. max. unit t su:sta t hd:sta t su:dat t hd:dat t buf t su:sto t high t low sda scl i 2 c timing diagram
low voltage voice coil motor driver A3907 5 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com output current level control the A3907 output current level, i out , is controlled dynamically by programming the d-to-a converter (dac) value via the i 2 c serial port. a 10-bit level control code, having a decimal equiva- lent value from 0 through 1023, is clocked into the sda pin. the target output current can be calculated by: i out = n dac 100 a , (1) where n dac is the decimal equivalent of the level control code. for example, a code of 5 (00000101 2 ) sets an output current target of 500 a. programming level control code 0 disables the output sink drive. in addition, the dac is automatically set to code 0 at power-up and also at a fault condition on vdd. output current slew rate control when a new current level control instruction is received on the sda input, the A3907 moves to the new target currrent level by incrementing or decrementing through each of the intermediate current levels until it arrives at the new programmed value. the control instruction received at the sda input includes both the 10-bit level control code and a 4-bit ramp control code. the level control code is used to determine the absolute value of the changes in i out (see equation 1), and the ramp control code maps to a lookup table of time intervals (represented in table 1). together, these two codes determine the shape of the current level change function. step or ramp function the A3907 can change to the new target level using either a step or a ramp slew rate function. when a step function is selected, the A3907 moves to the new target level without imposing any additional time delays between dac updates. to select a step function, program one of the four ramp control codes in table 1 that disable the ramp feature. when a ramp function is selected, the A3907 imposes time delays between each dac update, calculated according to the particular function option selected. to select a ramp function, program one of the twelve ramp control codes in table 1 that enable the ramp feature. single or dual subintervals for either the step or the ramp slew rate method, the total change can be accomplished in either one continuous time interval, or divided over two sequential time subintervals. when the single-interval method is selected, the total change in i out is accomplished over the total time interval deter- mined by the rate control code in table 1, calculated as follows: code t = |(code newtarget ? code previoustarget )| / 2 , (2) and t = code t t dt , (3) where t dt is the delay factor, in table 1. when the dual-subintervals method is selected, the elapsed time for each subinterval is determined separately by the rate con- trol code in table 1. the time interval from initiation, t0, to the switchover point, t1, is calculated as follows: code switchover = |(code newtarget ? code previoustarget )| / 2 , (4) and t1 = code switchover t dt1 , (5) where t dt1 is the delay factor for the initial time subinterval, in table 1. the current amplitude at the switchover point is calculated based on equation 1, as follows: i switchover = ( code low + code switchover ) 100 a , (6) where code low is the lesser of code newtarget and code previoustarget . the time interval from the switchover point, t1, until the target current level is reached, t2, is calculated as follows: t2?t1 = code switchover t dt2 , (7) where t dt2 is the delay factor for the second time subinterval, in table 1. output function programming two examples of output level and slew rate programming are shown in figure 1. both examples are ramp slew rate functions, using the dual-subinterval method. in example a, an increment in i out is shown, and example b shows a decrement in i out . functional description
low voltage voice coil motor driver A3907 6 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com 250 200 150 100 50 0 25 20 15 10 5 0 0 t0 t1 t2 t0 t1 t2 0.5 1.0 time (ms) level control code i out (ma) 100 80 60 40 20 0 i out (ma) 1.5 2.0 2.5 1000 900 800 700 600 500 400 300 200 100 0 0 5 10 15 20 time (ms) level control code 25 30 35 0 expanded below 0.5 1.0 1.5 2.0 2.5 0 5 10 15 20 25 30 35 012345 800 700 600 00.14 0.04 0.08 0.10 0.12 150 100 15 10 t1 80 70 60 t1 expanded below example a ? the A3907 has been previously programmed to level con- trol code 100 (1100100 2 ), for a target i out of 100 100 a = 10 ma (equation 1). ? the new target current level is 20 ma, so level control code 200 (11001000 2 ) is programmed (invert equation 1). ? for this example, the slew rate function selected is represented by ramp control code 1100 2 : ramp, dual-subinterval, initial subinterval delay factor 781 ns, second subinterval delay factor 50 s. ? the A3907 determines the switchover point, t1, as follows: code switchover = |(200 ? 100)|/2 = 50 (equation 2), t1 = 50 0.781 s = 39 s (equation 5), i t1 = 50 + 100 100 a = 150 a (equation 6). ? the A3907 determines the target time final point, t2, as follows: code switchover = |(200 ? 100)|/2 = 50 (equation 2) , t2?t1 = 50 50 s = 2.5 ms (equation 5). example b ? the A3907 has been previously programmed to level control code 1000 ( 1111 101000 2 ), for a target i out of 1000 100 a = 100 ma (equation 1). ? the new target current level is 30 ma, so level control code 300 (100101100 2 ) is programmed (invert equation 1). ? for this example, the slew rate function selected is represented by ramp control code 1101 2 : ramp, dual-subinterval, initial subinterval delay factor 781 ns, second subinterval delay factor 100 s. ? the A3907 determines the switchover point, t2, as follows: code switchover = |(1000 ? 300)|/2 = 350 (equation 2), t1 = 350 0.781 s = 273 s (equation 5), i t1 = 350 + 300 100 a = 65 a (equation 6). ? the A3907 determines the target time final point, t1, as follows: code switchover = |(1000 ? 300)|/2 = 350 (equation 2) , t2?t1 = 350 100 s = 35 ms (equation 5). table 1. slew rate function table slew rate method timer bits settings delay factor ( s) t3 t2 t1 t0 t dt single interval 0 0 0 0 0 (ramp feature disabled) 0 0 0 1 6.25 0 0 1 0 12.5 0 0 1 1 25 0 1 0 0 50 0 1 0 1 100 0 1 1 0 200 0 1 1 1 0 (ramp feature disabled) dual interval t3 t2 t1 t0 t dt1 t dt2 1 0 0 0 0 (ramp feature disabled) 1 0 0 1 0.781 6.25 1 0 1 0 12.5 1 0 1 1 25 1 1 0 0 50 1 1 0 1 100 1 1 1 0 200 1 1 1 1 0 (ramp feature disabled) figure 1. examples of programmed i out change example b example a
low voltage voice coil motor driver A3907 7 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com i 2 c interface this is a serial interface that uses two bus lines, scl and sda, to access the internal control registers. data is exchanged between a microcontroller (master) and the A3907 (slave). the clock input to scl is generated by the master, while sda functions as either an input or an open drain output, depending on the direction of the data. the i 2 c input thresholds do not depend on the vdd voltage of the A3907. the levels are fixed at approximately 1v. the fixed levels allow the sda and scl lines to be pulled-up to a different logic level than the vdd supply of the 3907. timing considerations the control sequence of the commu- nication through the i 2 c interface is composed of several steps in sequence: 1. start condition. defined by a negative edge on the sda line, while scl is high. 2. address cycle. 7 bits of address, plus 1 bit to indicate write (0) or read(1), and an acknowledge bit. the address setting is 0x18, 0x1a, 0x1c, or 0x1e. 3. data cycles. write requires 7 bits of address data selecting the internal control register, followed by an acknowledge bit. 4. stop condition. defined by a positive edge on the sda line, while scl is high. except to indicate a start or stop condition, sda must be stable while the clock is high. sda can only be changed while scl is low. it is possible for the start or stop condition to occur at any time during a data transfer. the A3907 always responds by reset- ting the data transfer sequence. to indicate a write cycle, the read/write bit is set to low. mulitple writes are allowed. if desired, the readback bit can be set to high to check what was last written. the acknowledge bit is used by the master to determine if the slave device is responding to its address and data transmis- sions. when the A3907 decodes the 7-bit address field as a valid address, it responds by pulling sda low during the ninth clock cycle. during a data write from the master, the A3907 pulls sda low during the clock cycle that follows the last data byte, in order to indicate that the data has been successfully received. in both cases, the master device must release the sda line before the ninth clock cycle, in order to allow this handshaking to occur. slave (A3907) address device identifier r/w 0 0 0 1 1 x x 0 control register ms byte (i 2 c write register) bit name function 0 d4 dac 1 d5 dac 2 d6 dac 3 d7 dac 4 d8 dac 5 d9 dac msb 6 t5 not used 7 sleep 1=sleep 0=normal control register ms byte (i 2 c write register) bit name function 0 t0 time setting lsb 1 t1 time setting bit 1 2 t2 time setting bit2 3 t3 time setting bit 3 4 d0 dac lsb 5 d1 dac 6 d2 dac 7 d3 dac write operation
low voltage voice coil motor driver A3907 8 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com output voltage range to guarantee the accuracy and linearity of the programmed cur- rent, the voltage on the iout pin, v out , should be greater than 350 mv. the output voltage is a function of the battery voltage, motor resistance, and the programmed load current, i out . clamp diode when the ic output is turned off, the load inductance causes the output voltage, v out , to rise. an internal clamp diode, connected between the iout and vdd pins, is integrated into the ic to ensure the output voltage remains at a safe level. s l e e p pin the s l e e p pin is an active low input. a logic low signal disables all of the internal circuitry and prevents the ic from draining bat- tery power. applications information headroom the current may not reach the programmed level if there is not adequate headroom in the output circuit. the ic output voltage must be over 350mv to guarantee normal linear operation. v dd , i load , and r load can be adjusted to ensure the device operates in the linear range. when equation 7 is not satisfied, the load current will be limited by the series impedance and may not reach the programmed level. v dd (min) ? r load (max) i out (max) 350 mv . (7) i out errors defined relative accuracy (inl) this error is calculated by measuring the worse case deviation from a straight line defined from end- points. the straight line endpoints are defined by the actual mea- sured values at level control code 63 and 1023 (see figure 2). differential nonlinearity (dnl) a measure of the monoto- nicity of the dac (see equation 8). the slope of the line must always be positive for each incremental step. dnl = ( i out ( n +1) ? i out ( n )) / lsb , (8) where (n = 64 to 1023). dnl should be < 1 lsb. offset error the measured output current at level control code 64, compared to the ideal value according to the transfer function: 6.4 ma. gain error the difference between the slopes of the ideal transfer function and the actual transfer function. the gain error is calculated by subtracting the offset error at level control code 16 from the actual transfer function. this calculated value is com- pared to the ideal transfer function and reported as a percentage of the ideal full scale value: 102.3 ma (see figure 3). gain error drift the change in slope of the transfer function due to temperature, expressed as lsb / c.
low voltage voice coil motor driver A3907 9 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com 064 512 level control code 1023 relative accuracy (64-1023), errors exaggerated for clarity straight line between measured codes 64 and 1023 0 i out (ma) 102.3 figure 2. relative accuracy level control code i out (ma) 0 01023 102.3 gain error offset error 63 ideal dac actual dac (errors exaggerated) calculated gain error, offset error removed figure 3. gain error
low voltage voice coil motor driver A3907 10 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com seating plane c b a 0.5000.050 0.9650.020 1.4650.020 0.500 1.000 0.500 1.000 0.500 0.500 0.233 0.233 x ? 0.2000.030 c 0.05 6x ? 0.10 m ? 0.05 m c a b c 2 1 1 2 cba 1 2 cba cba a b c die orientation mark all dimensions nominal, not for tooling use dimensions in millimeters exact configuration at supplier discretion within limits shown a x ? 17 pcb layout reference view reference view of typical layout for solder pads all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances b c terminal #a1 mark area cg package, 6-ball wlcsp
low voltage voice coil motor driver A3907 11 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com for the latest version of this document, visit our website: www.allegromicro.com copyright ?2009-2013, allegro microsystems, llc allegro microsystems, llc reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions a s may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, llc assumes n o re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use.

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